#ifndef __IIC_H__
#define __IIC_H__

#include <nxos.h>

#define TWI0_ADDR_BASE (0x02502000)
#define TWI1_ADDR_BASE (0x02502400)
#define TWI2_ADDR_BASE (0x02502800)
#define TWI3_ADDR_BASE (0x02502C00)

#define TWI_ADDR_OFFSET     (0x0000)
#define TWI_XADDR_OFFSET    (0x0004)
#define TWI_DATA_OFFSET     (0x0008)
#define TWI_CNTR_OFFSET     (0x000c)
#define TWI_STAT_OFFSET     (0x0010)
#define TWI_CCR_OFFSET      (0x0014)
#define TWI_SRST_OFFSET     (0x0018)
#define TWI_EFR_OFFSET      (0x001c)
#define TWI_LCR_OFFSET      (0x0020)

#define TWI_DRV_CTRL_OFFSET     (0x0200)
#define TWI_DRV_CFG_OFFSET      (0x0204)
#define TWI_DRV_SLV_OFFSET      (0x0208)
#define TWI_DRV_FMT_OFFSET      (0x020C)
#define TWI_DRV_BUS_CTRL        (0x0210)
#define TWI_DRV_INT_CTRL        (0x0214)
#define TWI_DRV_DMA_CFG         (0x0218)
#define TWI_DRV_FIFO_CON        (0x021C)
#define TWI_DRV_SEND_FIFO_ACC   (0x0300)
#define TWI_DRV_RECV_FIFO_ACC   (0x0304)

#define I2C_WR                0x0000
#define I2C_RD               (1u << 0)
#define I2C_ADDR_10BIT       (1u << 2)  /* this is a ten bit chip address */
#define I2C_NO_START         (1u << 4)
#define I2C_IGNORE_NACK      (1u << 5)
#define I2C_NO_READ_ACK      (1u << 6)  /* when I2C reading, we do not ACK */
#define I2C_NO_STOP          (1u << 7)


struct i2c_msg
{
    NX_U16 addr;
    NX_U16 flags;
    NX_U16 len;
    NX_U8  *buf;
};

NX_IArch f133_i2c_mst_xfer(struct i2c_msg msgs[], NX_U32 num);
void NX_IicDriverInit(void);

#endif